If the \COUNT bit is 0, then the CEs for all of the counters whose CNT
bits are 1 are latched .If CNT0=CNT2=1 but CNT1=0, then the CEs in
counters and 2 are latched but the CE in counter 1 is not latched.
Similarly, \STAT=0 causes the counters' status registers to be prepared
for input.
Given that N is the initial count, the modes are:
Mode 0 (Interrupt on Terminal Count) - GATE=1 enables counting and GATE=0
disables counting, and GATE has no effect on OUT.The contents of CR are
transferred to CE on the first CLK pulse after CR is written into by the
processor, regardless of the signal on the GATE pin.The pulse that loads
CE is not included in the count.OUT goes low when there is an output to
the control register and remains low until the count goes to 0.Mode 0 is
primatily for event counting.
Mode 1 (Hardware Retriggerable One-Shot) - After CR has been loaded with
N, a 0-to-1 transition on GATE will cause CE to be loaded, a 1-to-0
transition at OUT, and the count to begin.When the count reaches 0 OUT will
go high, thus producing a negative-going OUT pulse N clock periods long.
Mode 2 (Periodic Interval Timer) - After loading CR with N, a transfer is
made from CR to CE on the next clock pulse.OUT goes from 1 to 0 when the
count becomes 1 and remains low for one CLK pulse;then it returns to 1 and
CE is reloaded from CR, thus giving a negative pulse at OUT after every N
clock cycles.GATE=1 enables the count and GATE=0 disables the count.
A 0-to-1 transition on GATE also causes the count to be reinitialized on
the next clock pulse.This mode is used to provide a programable periodic
interval timer.
Mode 3 (Square-Wave Generator) - It is similar to mode 2 except that OUT
goes low when half the initial count is reached and remains low until the
count becomes 0.Hence the duty cycle is changed.As before, GATE enables
and disables the count and a 0-to-1 transition on GATE reinitializes the
count.This mode may be used for baud rate generator.
Mode 4 (Software-Triggered Strobe) - It is similar to mode 0 except that
OUT is high while the counting is taking place and produces a one-clock
period negative pulse when the count reaches 0.
Mode 5 (Hardware-Triggered Strobe-Retriggerable) - After CR is loaded,
a 0-to-1 transition on GATE will cause a transfer from CR to CE during the
next CLK pulse.OUT will be high during the counting but will go low for
one CLK period when the count becomes 0.GATE can reinitialize counting
at any time.
