SDSP Write Memory
Procedure


PROCEDURE memory_write (addr : IN bit_32; data : IN bit_32) IS
BEGIN 
  a_bus <= addr AFTER Tpd;  -- start bus cycle
  fetch <= '0' AFTER Tpd;
  WAIT UNTIL phi1 = '1';
Place address on a _bus
  IF reset = '1' THEN RETURN; END IF;
  write <= '1' AFTER Tpd;  -- T1 phase
  WAIT UNTIL phi2 = '1';
  d_bus <= data AFTER Tpd;
  WAIT UNTIL phi1 = '1'; 
Assert write signal and place data on d_bus
  IF reset = '1' THEN RETURN; END IF;
  LOOP -- T2 phase
    WAIT UNTIL phi2 = '0';
    IF reset = '1' THEN RETURN; END IF;
    EXIT WHEN ready = '1';   -- end of T2
  END LOOP;
  WAIT UNTIL phi1 = '1';
Wait until data is written and ready signal is asserted
  IF reset = '1' THEN RETURN; END IF;
  write <='0' AFTER Tpd; -- Ti phase at end of cycle
  d_bus <= null AFTER Tpd;
END memory_write;
Deassert write signal and detach d_bus