SYSTEM BUS STRUCTURE

Pin(s) Symbol In/Out(3 State) Description

1 GND Ground

2-16 AD14-AD0 I/O-3 Outputs address during the first part of the bus cycle and inputs or outputs data during the remaining part of the bus cycle. (On 8088, AD15-AD8 are A15-A8 and are only for outputting address bits.)

17 NMI I Nonmaskable interrupt request - positive-going edge triggered.

18 INTR I Maskable interrupt request - level triggered

19 CLK I Clock- 33% duty cycle, maximum rate depends on CPU model:
5Mhz for 8086
8MHz for 8086-2
10MHz for 8086-1
(25MHz for 8088, and 8MHz for the 8088-2)

20 GND Ground

21 RESET I Terminates activity, clears PSW, IP, DS, SS, ES and the instruction queue and sets CS to FFFF. Processing begins at FFFF0 when signal is dropped. Signal must be 1 for at least 4 clock cycles.

22 READY I Acknowledgment from memory or I/O interface that CPU can complete the current bus cycle.

23 /TEST I Used in conjuction with the WAIT instruction in multiprocessing environments. A WAIT instruction will cause the CPU to idle, except for processing interrupts, until a 0 is appiled to this pin - see Chap. 11.

24-31 - - Definition depends on mode - see Flgs. 8-3 and 8-8.

32 /RD O-3 Indicates a memory or I/O read is to be performed.

33 MN / /MX I CPU is in minimum mode when strapped to +5V and in maximum mode when grounded.

34 /BHE / S7 O-3 If 0 during first part of bus cycle this pin indicates that at least one byte of the current transfer is to be made on pins AD15-AD8; if 1 the transfer is made on AD7-AD0. Status S7 is output during the latter part of bus cycle, but, presently, S7 has not been assigned a meaning. (On 8088, this pin is denoted /SS0 and is used in minimum mode to denote status. Logically equivalent to /S0 - see Fig.8-8. It is always 1 in maximum mode.

35-38 A19/S6-A16/S3 O-3 During the first part of the bus cycle the upper 4 bits of the address are output and during the remainder of the bus cycle status is output. S3 and S4 indicate the segment register being used as follows:
S4 S3 Register 0 0 ES 0 1 SS 1 0 CS or none 1 1 DS
S5 gives the current setting of IF. A6 is always 0.

39 AD15 I/O-3 Same as AD14-AD0

40 Vcc - Supply voltage - +5V +/-10%

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Pin(s)	Symbol	In/Out(3 State)	Description
1	GND		Ground
2-16	AD14-AD0	I/O-3	Outputs address during the first part of the bus cycle and inputs or outputs data during the remaining part of the bus cycle. (On 8088, AD15-AD8 are A15-A8 and are only for outputting address bits.)
17	NMI	I	Nonmaskable interrupt request - positive-going edge triggered.
18	INTR	I	Maskable interrupt request - level triggered
19	CLK	I	Clock- 33% duty cycle, maximum rate depends on CPU model: 5Mhz for 8086 8MHz for 8086-2 10MHz for 8086-1 (25MHz for 8088, and 8MHz for the 8088-2)
20	GND		Ground
21	RESET	I	Terminates activity, clears PSW, IP, DS, SS, ES and the instruction queue and sets CS to FFFF. Processing begins at FFFF0 when signal is dropped. Signal must be 1 for at least 4 clock cycles.
22	READY	I	Acknowledgment from memory or I/O interface that CPU can complete the current bus cycle.
23	/TEST	I	Used in conjuction with the WAIT instruction in multiprocessing environments. A WAIT instruction will cause the CPU to idle, except for processing interrupts, until a 0 is appiled to this pin - see Chap. 11.
24-31	-	-	Definition depends on mode - see Flgs. 8-3 and 8-8.
32	/RD	O-3	Indicates a memory or I/O read is to be performed.
33	MN / /MX	I	CPU is in minimum mode when strapped to +5V and in maximum mode when grounded.
34	/BHE / S7	O-3	If 0 during first part of bus cycle this pin indicates that at least one byte of the current transfer is to be made on pins AD15-AD8; if 1 the transfer is made on AD7-AD0. Status S7 is output during the latter part of bus cycle, but, presently, S7 has not been assigned a meaning. (On 8088, this pin is denoted /SS0 and is used in minimum mode to denote status. Logically equivalent to /S0 - see Fig.8-8. It is always 1 in maximum mode.
35-38	A19/S6-A16/S3	O-3	During the first part of the bus cycle the upper 4 bits of the address are output and during the remainder of the bus cycle status is output. S3 and S4 indicate the segment register being used as follows: S4 S3 Register 0 0 ES 0 1 SS 1 0 CS or none 1 1 DS S5 gives the current setting of IF. A6 is always 0.
39	AD15	I/O-3	Same as AD14-AD0
40	Vcc	-	Supply voltage - +5V +/-10%