There are several reasons why dynamic RAMs are attractive to memory
designers, especially when the memory is large.Three of the main reasons
are:
- High Density - For static RAM, a typical cell requires six MOS
transistors.The structure of a dynamic cell is much simpler and can be
implemented with three, or even one MOS transistor.As a result, more memory
cells can be put into a single chip and the number of memory chips needed
to implement a memory module is reduced.A common size for a dynamic RAM
chip is 16K x 1, and 64K x 1 devices are also available.
- Low Power Consumption - The power consumption per bit of a
dynamic RAM is considerably lower than that of static RAM.The power disipation
is less than 0.05 mW per bit for dynamic RAM and typically 0.2 mW per bit
for static RAM.This feature reduces the system power requirements and lowers
the cost.In addition, the power consumptionof dynamic RAM is extremely
low in standby mode: this makes it very attractive in the design of memory
that is made nonvolatile through the use of a backup power source.
- Economy - Dynamic RAM is less expensive per bit than static RAM.
However, dynamic RAM requires more supporting circuitry and, therefore,
there is little or no economic advantage when building a small memory system.
Intel has made available its 8203 dynamic RAM controller, which is specifically
designed to support its 2117,2118 and 2164 dynamic RAM memory devices.
Here we will concentrate on the 8203's use with the 2164, which is a 64K x 1
device.The block diagrams for the 2164 and 8203 are shown in Fig.10-12.
