 | Organization of the SDSP VHDL Model-- Notes Page -- | 
|
| Organization of the SDSP VHDL Model-- Notes Page -- |
|
The entire model necessary to simulate the SDSP consists of the testbench (located in file SDSPst.vhd), the SDSP processor model (located in file SDSPb.vhd), and the memory model (in file memory.vhd). A package of types used by all models is not shown here.