ARCHITECTURE structural OF config_test IS
SIGNAL S1, S2, S3, S4 : BIT;
COMPONENT FF
PORT (J, K: IN BIT; Q, Q_bar : OUT BIT);
END COMPONENT FF;
FOR UO : FF USE ENTITY Work.JKFF
PORT MAP (clk => Global_signals.CLK,
preset => Global_signals.preset,
clear => Global_signals.clear,
J => S1, K => S2,
Q => S3, Q_bar => S4);
BEGIN
UO : FF PORT MAP (S1, S2, S3, S4);
END structural;
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