ARCHITECTURE variables OF test IS SIGNAL a: BIT:='0'; b, c: BIT:='1'; BEGIN PROCESS (a, b, c) VARIABLE out_3, out_4 : BIT; BEGIN out_3 := a NAND b; out_4 := out_3 XOR c; END PROCESS; END variables;
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a
b
c
out_3
out_4
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0
1