9-2-2 A/D and D/A Example

Figure 9-23 shows how an 8255A could be connected to an A/D and D/A subsystem. Since during an A/D conversion the analog voltage must remain unchanged, a sample-and-hold circuit is needed to keep the analog signal constant while the conversion is being performed.Group A is configured as an input in mode 1. A conversion is initiated by a signal from the 8255A's PC7 pin.

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