3-8 LOGICAL INSTRUCTIONS
The 8086 instructions for performing logical operations are defined in Fig. 3-47. All of the instructions operate bitwise on their operands, which may be one byte or one word in length.
Figure 3-47 Logical instructions.
| Name | | Mnemonic and Format | | Description |
|---|
|
| Not | | NOT OPR | | (OPR) NOT (OPR) |
| Or | | OR DST,SRC | | (DST)(DST)  (SRC) |
| And | | AND DST,SRC | | (DST)(DST)  (SRC) |
| Exclusive Or | | XOR DST,SRC | | (DST)(DST)  (SRC) |
| Test | | TEST OPR1,OPR2 | | OPR1 OPR2; result not put anywhere, only the flags are affected |
|
Flags: NOT does not affect the flags. The other four instructions clear CF and OF, leave AF undetermined, and set SF, Zf, and PF according to the usual rules. |
|
Addressing modes: The NOT operand cannot be immediate. For the remaining instructions, unless the source operand is immediate, at least one of the operands must be a register. The other operand may have any addressing mode. |
masking operation. Bits are selectively set by applying a logical OR as follows:
Figure 3-48 Example of selectively setting, changing, clearing, and testing bits.
Data related directives, input, and other code
OR DL,00000101B ;SET BITS 2 AND 0
XOR DL,01000010B ;COMPLEMENT BITS 6 AND 1
AND DL,11100111B ;CLEAR BITS 3 AND 4
MOV AL,DL ;DUPLICATE RESULT IN AL
NOT AL ;AND BRANCH
TEST AL,10000010B ;TO EXIT IF BOTH
JZ EXIT ;BITS 7 AND 1 ARE SET
Output and other code |
Figure 3-49 Using bit settings for program control.
Data related directives, input, and other code
NOT AX ;BRANCH TO
TEST AX,4002H ;TASK1 IF BITS 14 AND 1
JZ TASK1 ;ARE SET, OR IF
TEST AX,280H ;BITS 9 AND 7
JZ TASK1 ;ARE SET
NOT AX ;BRANCH TO TASK2
TEST AX,18H ;IF BIT 3 OR BIT 4
JNZ TASK2 ;IS SET
TASK3: . ;OTHERWISE, TASK3
. ;IS EXECUTED
.
TASK1: .
.
.
TASK2: .
.
.
Output and other code |
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