All conditional branch instructions have the following 2-byte machine code format:
Figure 3-29 Correspondence between branch distances, values of D8, and branch addresses.
| Distance (in decimal) | D8 (in hexadecimal) | Branch Address | ||
|---|---|---|---|---|
| -128 | 80 | (IP)-128 | ||
| . | . | . | ||
| . | . | . | ||
| -2 | FE | (IP)-2 | ||
| -1 | FF | (IP)-1 | ||
| 0 | 00 | (IP) | ||
| 1 | 01 | (IP)+1 | ||
| 2 | 02 | (IP)+2 | ||
| . | . | . | ||
| . | . | . | ||
| 127 | 7F | (IP)+127 |
As an example of how the assembler determines the value of D8, consider the following sequence:
0050 AGAIN: INC CX 0052 ADD AX,(BX) 0054 JNS AGAIN 0056 NEXT: MOV RESULT,CX |
| 0050 | Effective branch address | |
| - 0056 | (IP) when JNS branch decision is made | |
| -6 |
Figure 3-30 Conditional branch instructions.
| Name | Mnemonic and Format | Alternate Mnemonic | Test Condition* | |||
|---|---|---|---|---|---|---|
| Branch on zero, or equal | JZ OPR | JE | ZF = 1 | |||
| Branch on nonzero, or not equal | JNZ OPR | JNE | ZF = 0 | |||
| Branch on sign set | JS OPR | SF = 1 | ||||
| Branch on sign clear | JNS OPR | SF = 0 | ||||
| Branch on overflow | JO OPR | OF = 1 | ||||
| Branch on no overflow | JNO OPR | OF = 0 | ||||
| Branch on parity set, or even parity | JP OPR | JPE | PF = 1 | |||
| Branch on parity clear, or odd parity | JNP OPR | JPO | PF = 0 | |||
| Branch on below, or not above or equal (unsigned) | JB OPR | JNAE,JC | CF = 1 | |||
| Branch on not below, or above or equal (unsigned) | JNB OPR | JAE,JNC | CF = 0 | |||
| Branch on below or equal, or not above (unsigned) | JBE OPR | JNA | CF  ZF = 1 | |||
| Branch on not below or equal, or above (unsigned) | JNBE OPR | JA | CF ZF = 0 | |||
| Branch on less, or not greater or equal (signed) | JL OPR | JNGE | SF  OF = 1 | |||
| Branch on not less, or greater or equal (signed) | JNL OPR | JGE | SF OF = 0 | |||
| Branch on less or equal, or not greater (signed) | JLE OPR | JNG | (SF OF) ZF = 1 | |||
| Branch on not less or equal, or greater (signed) | JNLE OPR | JG | (SF OF) ZF = 0 | |||
*If the test condition is met (IP) | ||||||
Flags: No flags are affected. | ||||||
Addressing modes: Mode is relative to IP. OPR must represent a label that is within -128 to 127 bytes of the instruction following the branch instruction. | ||||||
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(IP)+sign extended D8; otherwise (IP) are unchanged and the program continues in sequence.