Figure 3-19 Binary multiply and divide instructions.
Name | Mnemonic and Format | Description | ||
---|---|---|---|---|
Signed multiply | IMUL SRC | Byte operands (AX)(AL)*(SRC) Word operands (DX:AX)(AX)*(SRC) Product is signed | ||
Unsigned multiply | MUL SRC | Same as IMUL except that the operands and product are unsigned | ||
Signed divide | IDIV SRC | Byte divisor (AL)Quotient of (AX)/(SRC) (AH)Remainder of (AX)/(SRC) Word divisor (AX)Quotient of (DX:AX)/(SRC) (DX)Remainder of (DX:AX)/(SRC) Quotient and remainder are signed with the sign of the remainder being the sign of the dividend | ||
Unsigned divide | DIV SRC | Same as IDIV except that the operands, quotient, and remainder are unsigned | ||
Flags: IMUL and MUL set OF and CF to 1 if two bytes (words) are needed for the result; otherwise these flags are reset to 0. The remaining condition flags are undefined. For IDIV and DIV all condition flags are undefined. | ||||
Addressing modes: The source operands in these instructions cannot be immediate, but all other addressing modes are permissible. The destination must be AX or DX:AX. |
The unsigned multiply instruction, MUL, is primarily used for performing multiple-precision multiply operations. To see how a double-precision unsigned multiply is accomplished, consider the two nonnegative double-precision numbers a216 + b and c216 + d, where a, b, c, and d represent the coefficients corresponding to the base 216. Base 216 multiplication is carried out as follows:
a216 | + | b | ||
x | c216 | + | d | |
ad216 | + | bd | ||
ac232 | + | bc216 | ||
ac232 | + | (ad+bc)216 | +bd |
Noting that ad216 and bc216 are equivalent to ad and bc followed by sixteen 0 bits, and ac232 is ac followed by thirty-two 0 bits, the product can be found by:
A program sequence for executing the double-precision calculation
Figure 3-20 Program sequence for executing the double-precision calculation.
Data related directives, input, and other code DPX, DPY, and DPZ are defined as word variables MOV AX,DPX ;MULTIPLY (DPX) MUL DPY ;BY (DPY) AND MOV DPZ,AX ;STORE LOW-ORDER RESULT IN DPZ MOV CX,DX ;AND HIGH-ORDER RESULT IN CX MOV AX,DPX+2 ;MULTIPLY (DPX+2) MUL DPY ;BY (DPY) AND MOV BX,DX ;STORE HIGH-ORDER RESULT IN BX ADD CX,AX ;AND LOW-ORDER RESULT TO CX ADC BX,0 ;AND ADD CARRY TO BX MOV AX,DPX ;MULTIPLY (DPX) MUL DPY+2 ;BY (DPY+2) ADD CX,AX ;DOUBLE-PRECISION ADD ADC BX,CX ;(DX:AX) AND (BX:CX) MOV DPZ+2,CX ;STORE LOW-ORDER RESULT IN DPZ+2 MOV CX,0 ;AND CARRY ADC CX,0 ;IN CX MOV AX,DPX+2 ;MULTIPLY (DPX+2) MUL DPY+2 ;BY (DPY+2) ADD AX,BX ;ADD LOW-ORDER OF THIS RESULT TO ;HIGH-ORDER OF PREVIOUS RESULT ADC DX,CX ;ADD HIGH-ORDER OF THIS RESULT WITH ;INTERMEDIATE CARRIES MOV DPZ+4,AX ;STORE IN DPZ+4 MOV DPZ+6,DX ;AND DPZ+6Output and other code |
This is page 30.