EDCOMP - This simulator has been developed at School of Electrical Engineering, the University of Belgrade, Serbia. EDCOMP is an educational computer system with a Web-based RTL simulator. EDCOMP includes a CISC processor, a main memory, an I/O subsystem with a direct memory access (DMA) controller, a non-DMA controller, six peripheral controllers, and an arbitrator. The Web-based graphical simulator supports animation of instruction execution and allows students to write their own assembly programs, translate them, interactively set and examine values of memory locations, registers, and I/O units; and run simulation. The simulator enables users to run simulation clock by clock, instruction by instruction, and allows the user to set break points on the specific values. This simulator has been developed using Java programming language. It can be run on Windows, Linux, and MacOS, or any other OS with Java VM. EDCOMP is a flexible, Web-based, educational environment designed to help teaching and learning in computer architecture and organization courses [59, 60]. This program can be used by students. It can be used for educational purposes to introduce CISC instruction set, addressing modes, computer organization, integer and floating point arithmetic, interrupt handling, I/O fundamentals, data buses, and arbitration. This simulator has been used at The Belgrade University.