DLXview – simulator was developed at Purdue University, School of Electrical and Computer Engineering, USA, as a component of the CASLE project. DLXview is an interactive pipeline simulator that uses the DLX set of instructions and simulates three versions of the DLX pipeline: basic, scoreboard, and Tomasulo. Top level organization of Basic DLX pipeline and parts of DLX Tomasulo and Scoreboard algorithm are visi-ble. Scheduling algorithm is placed as a parameter at the beginning of simulation. Along with this, instruction dilatation is placed as one of important parameters. Compo-nents that can be used in the assembly language are instructions and labels. During simulation it is possible to step one clock or instruction backwards, in order to study the simulated behavior. This simulator was developed using C programming language. System was tested on Solaris, SunOS, HP-UX, and on Linux. The main goal of DLXview is to provide a visual, interactive environment where the operation of a pipe-lined processor is easier to understand correctly than by trying to imagine the operation from a text description. During simulation the user can monitor the following information: usual pipeline time-table, instructions in each pipeline phase, in time for each clock, and stall cycle. Beside this each pipeline operational unit, those that work with integers and those that work with floating point are available on the schematic level with clearly denoted registers [13, 31]. This simulator is suitable for introducing pipelined architecture to the students. This simulator was used for undergraduate and graduate students for experimenting with the total-system effect of changing the num-ber of registers, instruction latencies, optimizations used, etc.